PIC18F46K80T-I/SP View Datasheet(PDF) - Microchip Technology

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Description

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PIC18F46K80T-I/SP

28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

Microchip Technology 

PIC18F66K80 FAMILY

18.4.2 CAPACITANCE CALIBRATION

There is a small amount of capacitance from the inter-

nal A/D Converter sample capacitor as well as stray

capacitance from the circuit board traces and pads that

affect the precision of capacitance measurements. A

measurement of the stray capacitance can be taken by

making sure the desired capacitance to be measured

has been removed.

After removing the capacitance to be measured:

1. Initialize the A/D Converter and the CTMU.

2. Set EDG1STAT (= 1).

3. Wait for a fixed delay of time, t.

4. Clear EDG1STAT.

5. Perform an A/D conversion.

6. Calculate the stray and A/D sample capacitances:

COFFSET = CSTRAY + CAD = (I • t)/V

Where:

• I is known from the current source measurement

step

• t is a fixed delay

• V is measured by performing an A/D conversion

This measured value is then stored and used for

calculations of time measurement or subtracted for

capacitance measurement. For calibration, it is

expected that the capacitance of CSTRAY + CAD is

approximately known; CAD is approximately 4 pF.

An iterative process may be required to adjust the time,

t, that the circuit is charged to obtain a reasonable volt-

age reading from the A/D Converter. The value of t may

be determined by setting COFFSET to a theoretical value

and solving for t. For example, if CSTRAY is theoretically

calculated to be 11 pF, and V is expected to be 70% of

VDD or 2.31V, t would be:

(4 pF + 11 pF) • 2.31V/0.55 A

or 63 s.

See Example 18-3 for a typical routine for CTMU

capacitance calibration.

DS39977F-page 244

 2010-2012 Microchip Technology Inc.

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