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PIC16LF1459T-E/SL View Datasheet(PDF) - Microchip Technology

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PIC16LF1459T-E/SL Datasheet PDF : 418 Pages
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PIC16(L)F1454/5/9
EXAMPLE 11-2: ERASING ONE ROW OF PROGRAM MEMORY
; This row erase routine assumes the following:
; 1. A valid address within the erase row is loaded in ADDRH:ADDRL
; 2. ADDRH and ADDRL are located in shared data memory 0x70 - 0x7F (common RAM)
BCF
BANKSEL
MOVF
MOVWF
MOVF
MOVWF
BCF
BSF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
BCF
BSF
INTCON,GIE
PMADRL
ADDRL,W
PMADRL
ADDRH,W
PMADRH
PMCON1,CFGS
PMCON1,FREE
PMCON1,WREN
55h
PMCON2
0AAh
PMCON2
PMCON1,WR
PMCON1,WREN
INTCON,GIE
; Disable ints so required sequences will execute properly
; Load lower 8 bits of erase address boundary
; Load upper 6 bits of erase address boundary
; Not configuration space
; Specify an erase operation
; Enable writes
; Start of required sequence to initiate erase
; Write 55h
;
; Write AAh
; Set WR bit to begin erase
; NOP instructions are forced as processor starts
; row erase of program memory.
;
; The processor stalls until the erase process is complete
; after erase processor continues with 3rd instruction
; Disable writes
; Enable interrupts
2012 Microchip Technology Inc.
Preliminary
DS41639A-page 117

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