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PIC16F1459T-E/SL View Datasheet(PDF) - Microchip Technology

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Description
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PIC16F1459T-E/SL Datasheet PDF : 418 Pages
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PIC16(L)F1454/5/9
REGISTER 12-6: WPUA: WEAK PULL-UP PORTA REGISTER
U-0
bit 7
U-0
R/W-1/1
R/W-1/1
R/W-1/1
U-0
WPUA5
WPUA4
WPUA3
U-0
U-0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5-3
bit 2-0
Unimplemented: Read as ‘0
WPUA<5:3>: Weak Pull-up Register bits(3)
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0
Note 1:
2:
3:
Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is configured as an output.
For the WPUA3 bit, when MCLRE = 1, weak pull-up is internally enabled, but not reported here.
TABLE 12-3: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Name
ANSELA(3)
APFCON
LATA
Bit 7
Bit 6
Bit 5
CLKRSEL SDOSEL(2)
SSSEL
LATA5
Bit 4
ANSA4
LATA4
Bit 3
Bit 2
T1GSEL
P2SEL(2)
Bit 1
Bit 0
Register
on Page
133
130
133
OPTION_REG WPUEN INTEDG TMR0CS TMR0SE
PSA
PS<2:0>
185
PORTA
TRISA
RA5
RA4
RA3
RA1
RA0
132
TRISA5 TRISA4
(1)
(1)
(1)
132
WPUA
WPUA5 WPUA4 WPUA3
134
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.
Unimplemented, read as ‘1’.
PIC16(L)F1454/5 only.
PIC16(L)F1455/9 only.
TABLE 12-4: SUMMARY OF CONFIGURATION WORD WITH PORTA
Name Bits Bit -/7
Bit -/6
Bit 13/5
Bit 12/4
Bit 11/3
Bit 10/2
Bit 9/1
Bit 8/0
13:8
CONFIG1
7:0
CP
MCLRE
FCMEN
PWRTE
IESO CLKOUTEN
WDTE<1:0>
BOREN<1:0>
FOSC<2:0>
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by PORTA.
Register
on Page
52
DS41639A-page 134
Preliminary
2012 Microchip Technology Inc.

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