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ST72621L4M1(2002) View Datasheet(PDF) - STMicroelectronics

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ST72621L4M1 Datasheet PDF : 133 Pages
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ST7262
PWM AUTO-RELOAD TIMER (Cont’d)
Output compare and Time base interrupt
On overflow, the OVF flag of the ARTCSR register
is set and an overflow interrupt request is generat-
ed if the overflow interrupt enable bit, OIE, in the
ARTCSR register, is set. The OVF flag must be re-
set by the user software. This interrupt can be
used as a time base in the application.
External clock and event detector mode
Using the fEXT external prescaler input clock, the
auto-reload timer can be used as an external clock
event detector. In this mode, the ARTARR register
is used to select the nEVENT number of events to
be counted before setting the OVF flag.
nEVENT = 256 - ARTARR
When entering HALT mode while fEXT is selected,
all the timer control registers are frozen but the
counter continues to increment. If the OIE bit is
set, the next overflow of the counter will generate
an interrupt which wakes up the MCU.
Figure 35. External Event Detector Example (3 counts)
fEXT=fCOUNTER
ARTARR=FDh
COUNTER
FDh
FEh
FFh
FDh
FEh
FFh
FDh
OVF
ARTCSR READ
ARTCSR READ
INTERRUPT
IF OIE=1
INTERRUPT
IF OIE=1
t
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