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S25FL128SDPBFN000 View Datasheet(PDF) - Cypress Semiconductor

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Description
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S25FL128SDPBFN000 Datasheet PDF : 144 Pages
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S25FL128S, S25FL256S
9.10 Embedded Algorithm Performance Tables
Table 9.7 Program and Erase Performance
Symbol
tW
tPP
WRR Write Time
Page Programming (512 bytes)
Page Programming (256 bytes)
Parameter
Min
Typ (1)
Max (2)
Unit
140
500
ms
340
750
250
750 (3)
µs
Sector Erase Time (64-kB / 4-kB physical sectors)
130
650 (4)
ms
Sector Erase Time
tSE
(64 kB Top/Bottom: logical sector = 16 x 4-kB physical sectors)
Sector Erase Time
(256-kB logical sectors = 4 x 64-kB physical sectors)
2,080
10,400
ms
520
2600
ms
tBE
Bulk Erase Time (S25FL128S)
tBE
Bulk Erase Time (S25FL256S)
33
165
sec
66
330
sec
Notes:
1. Typical program and erase times assume the following conditions: 25°C, VCC = 3.0V; 10,000 cycles; checkerboard data pattern.
2. Under worst case conditions of 90°C; 100,000 cycles max.
3. Maximum value also applies to OTPP, PPBP, ASPP, PASSP, ABWR, and PNVDLR programming commands.
4. Maximum value also applies to the PPBE erase command.
Table 9.8 Program Suspend AC Parameters
Parameter
Program Suspend Latency (tPSL)
Program Resume to next Program Suspend (tPRS)
Min
Typical
Max
40
0.06
100
Unit
Comments
µs
The time from Program Suspend command until the WIP bit
is 0
Minimum is the time needed to issue the next Program
µs
Suspend command but typical periods are needed for
Program to progress to completion
Table 9.9 Erase Suspend AC Parameters
Parameter
Erase Suspend Latency (tESL)
Min
Typical
Max
45
Erase Resume to next Erase Suspend (tERS)
0.06
100
Unit
Comments
µs
The time from Erase Suspend command until the WIP bit is
0
Minimum is the time needed to issue the next Erase
µs
Suspend command but typical periods are needed for the
Erase to progress to completion
Document Number: 001-98283 Rev. *I
Page 117 of 144

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