S25FL256SDSNHIB03 View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

Manufacturer

S25FL256SDSNHIB03

128 Mbit (16 Mbyte), 256 Mbit (32 Mbyte) 3.0V SPI Flash Memory

Cypress Semiconductor 

S25FL128S, S25FL256S

4.2.3

Input Signal Overshoot

During DC conditions, input or I/O signals should remain equal to or between VSS and VIO. During voltage transitions, inputs or I/Os

may overshoot VSS to –2.0V or overshoot to VIO +2.0V, for periods up to 20 ns.

Figure 4.1 Maximum Negative Overshoot Waveform

20 ns

20 ns

VIL

- 2.0V

20 ns

VIO + 2.0V

Figure 4.2 Maximum Positive Overshoot Waveform

20 ns

VIH

20 ns

20 ns

4.3 Power-Up and Power-Down

The device must not be selected at power-up or power-down (that is, CS# must follow the voltage applied on VCC) until VCC reaches

the correct value as follows:

VCC (min) at power-up, and then for a further delay of tPU

VSS at power-down

A simple pull-up resistor (generally of the order of 100 k) on Chip Select (CS#) can usually be used to insure safe and proper

power-up and power-down.

The device ignores all instructions until a time delay of tPU has elapsed after the moment that VCC rises above the minimum VCC

threshold. See Figure 4.3. However, correct operation of the device is not guaranteed if VCC returns below VCC (min) during tPU. No

command should be sent to the device until the end of tPU.

After power-up (tPU), the device is in Standby mode (not Deep Power Down mode), draws CMOS standby current (ISB), and the

WEL bit is reset.

During power-down or voltage drops below VCC (cut-off), the voltage must drop below VCC (low) for a period of tPD for the part to

initialize correctly on power-up. See Figure 4.4. If during a voltage drop the VCC stays above VCC (cut-off) the part will stay initialized

and will work correctly when VCC is again above VCC (min). In the event Power-on Reset (POR) did not complete correctly after

power up, the assertion of the RESET# signal or receiving a software reset command (RESET) will restart the POR process.

Normal precautions must be taken for supply rail decoupling to stabilize the VCC supply at the device. Each device in a system

should have the VCC rail decoupled by a suitable capacitor close to the package supply connection (this capacitor is generally of the

order of 0.1 µf).

Document Number: 001-98283 Rev. *I

Page 26 of 144

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