S25FL128S, S25FL256S
5.4 SDR AC Characteristics
Table 5.4 AC Characteristics (Single Die Package, VIO = VCC 2.7V to 3.6V)
Symbol
Parameter
Min
Typ
Max
Unit
FSCK, R
SCK Clock Frequency for READ and 4READ instructions
DC
FSCK, C
SCK Clock Frequency for single commands as shown in
Table 9.2 on page 66 (4)
DC
50 (7)
133 (7)
MHz
MHz
SCK Clock Frequency for the following dual and quad
FSCK, C
commands: DOR, 4DOR, QOR, 4QOR, DIOR, 4DIOR, QIOR,
DC
4QIOR
104 (7)
MHz
FSCK, QPP
SCK Clock Frequency for the QPP, 4QPP commands
DC
80 (7)
MHz
PSCK
SCK Clock Period
1/ FSCK
tWH, tCH
tWL, tCL
tCRT, tCLCH
tCFT, tCHCL
tCS
Clock High Time (5)
Clock Low Time (5)
Clock Rise Time (slew rate)
Clock Fall Time (slew rate)
CS# High Time (Read Instructions)
CS# High Time (Program/Erase)
45% PSCK
45% PSCK
0.1
0.1
10
50
ns
ns
V/ns
V/ns
ns
tCSS
CS# Active Setup Time (relative to SCK)
3
ns
tCSH
CS# Active Hold Time (relative to SCK)
3
3000 (6)
ns
tSU
Data in Setup Time
2
ns
tHD
Data in Hold Time
2
ns
tV
Clock Low to Output Valid
8.0 (2)
7.65 (3)
ns
6.5 (4)
tHO
tDIS
tWPS
tWPH
tHLCH
tCHHH
tHHCH
tCHHL
tHZ
tLZ
Output Hold Time
Output Disable Time
WP# Setup Time
WP# Hold Time
HOLD# Active Setup Time (relative to SCK)
HOLD# Active Hold Time (relative to SCK)
HOLD# Non Active Setup Time (relative to SCK)
HOLD# Non Active Hold Time (relative to SCK)
HOLD# enable to Output Invalid
HOLD# disable to Output Valid
2
0
20 (1)
100 (1)
3
3
3
3
ns
8
ns
ns
ns
ns
ns
ns
ns
8
ns
8
ns
Notes:
1. Only applicable as a constraint for WRR instruction when SRWD is set to a 1.
2. Full VCC range (2.7 - 3.6V) and CL = 30 pF.
3. Regulated VCC range (3.0 - 3.6V) and CL = 30 pF.
4. Regulated VCC range (3.0 - 3.6V) and CL = 15 pF.
5. ±10% duty cycle is supported for frequencies 50 MHz.
6. Maximum value only applies during Program/Erase Suspend/Resume commands.
7. For Industrial Plus (-40°C to +105°C) and Extended (-40°C to +125°C) temperature range, all SCK clock frequencies are 5% slower than the Max values shown.
Document Number: 001-98283 Rev. *I
Page 32 of 144