S25FL256SDSBHIB10 View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

Manufacturer

S25FL256SDSBHIB10

128 Mbit (16 Mbyte), 256 Mbit (32 Mbyte) 3.0V SPI Flash Memory

Cypress Semiconductor 

S25FL128S, S25FL256S

9.2.2

Read Identification (RDID 9Fh)

The Read Identification (RDID) command provides read access to manufacturer identification, device identification, and Common

Flash Interface (CFI) information. The manufacturer identification is assigned by JEDEC. The CFI structure is defined by JEDEC

standard. The device identification and CFI values are assigned by Cypress.

The JEDEC Common Flash Interface (CFI) specification defines a device information structure, which allows a vendor-specified

software flash management program (driver) to be used for entire families of flash devices. Software support can then be device-

independent, JEDEC manufacturer ID independent, forward and backward-compatible for the specified flash device families.

System vendors can standardize their flash drivers for long-term software compatibility by using the CFI values to configure a family

driver from the CFI information of the device in use.

Any RDID command issued while a program, erase, or write cycle is in progress is ignored and has no effect on execution of the

program, erase, or write cycle that is in progress.

The RDID instruction is shifted on SI. After the last bit of the RDID instruction is shifted into the device, a byte of manufacturer

identification, two bytes of device identification, extended device identification, and CFI information will be shifted sequentially out on

SO. As a whole this information is referred to as ID-CFI. See ID-CFI Address Space on page 47 for the detail description of the ID-

CFI contents.

Continued shifting of output beyond the end of the defined ID-CFI address space will provide undefined data. The RDID command

sequence is terminated by driving CS# to the logic high state anytime during data output.

The maximum clock frequency for the RDID command is 133 MHz.

Figure 9.2 Read Identification (RDID) Command Sequence

C S#

SCK

SI

SO

0 1 2 3 4 5 6 7 8 9 10 28 29 30 31 32 33 34 652 653 654 655

Instruction

High Impedance

Manufacturer / Device Identification

Extended Device Information

012

20 21 22 23 24 25 26

644 645 646 1 647

9.2.3

Read Electronic Signature (RES) (ABh)

The RES command is used to read a single byte Electronic Signature from SO. RES is only supported for backward compatibility

and should not be used for new software designs. New software designs should instead make use of the RDID command.

The RES instruction is shifted in followed by three dummy bytes onto SI. After the last bit of the three dummy bytes are shifted into

the device, a byte of Electronic Signature will be shifted out of SO. Each bit is shifted out by the falling edge of SCK. The maximum

clock frequency for the RES command is 50 MHz.

The Electronic Signature can be read repeatedly by applying multiples of eight clock cycles.

The RES command sequence is terminated by driving CS# to the logic high state anytime during data output.

Document Number: 001-98283 Rev. *I

Page 71 of 144

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