CAPACITANCE
DESCRIPTION
Address/Control Input Capacitance
Input/Output Capacitance (DQ)
Clock Capacitance
ADVANCE
256Mb: x16, x32
2.5V VEXT, 1.8V VDD, 1.8V VDDQ, RLDRAM
CONDITIONS
TA = 25°C; f = 1 MHz
SYMBOL
CI
CO
CCK
MIN
2
2
2
MAX
4
4
4
UNITS
pF
pF
pF
AC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS
(+20°C £ TJ £ +110°C; +1.75V £ VDD £ +1.85V unless otherwise noted)
DESCRIPTION
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
CK Differential Input Voltage
CK Input Crossing Point
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
CK Differential Input Voltage
CK Input Crossing Point
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
CK Differential Input Voltage
CK Input Crossing Point
CONDITIONS
Matched Impedance Mode
Matched Impedance Mode
Matched Impedance Mode
Matched Impedance Mode
HSTL Strong
HSTL Strong
HSTL Strong
HSTL Strong
HSTL Weak
HSTL Weak
HSTL Weak
HSTL Weak
SYMBOL
VIH
VIL
VID
VIX
VIH
VIL
VID
VIX
VIH
VIL
VID
VIX
MIN
VREF + 0.3
VSSQ - 0.3
0.6
VREF - 0.15
VREF + 0.2
VSSQ - 0.3
0.6
VREF - 0.15
MAX
VDDQ + 0.3
VREF - 0.3
VDDQ + 0.6
VREF + 0.15
VDDQ + 0.3
VREF - 0.2
VDDQ + 0.6
VREF + 0.15
UNITS
V
V
V
V
V
V
V
V
V
V
V
V
256: x16, x32 RLDRAM
MT49H8M32_3.p65 – Rev. 3, Pub. 6/02
21
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.