16 Mbit Multi-Purpose Flash Plus
SST39VF1601C / SST39VF1602C
Data Sheet
TBP
ADDRESSES
555
2AA
555
ADDR
TAH
TCP
WE#
TAS
TCPH
OE#
TCH
CE#
TCS
TBY
TBR
RY/BY#
DQ15-0
XXAA
XX55
TDS
TDH
XXA0
DATA
WORD
(ADDR/DATA)
VALID
1380 F26.0
Note: WP# must be held in proper logic state (VIL or VIH) 1µs prior to and 1µs after the command sequence.
X can be VIL or VIH, but no other value.
FIGURE 8: CE# Controlled Program Cycle Timing Diagram
ADDRESS A19-0
CE#
OE#
WE#
RY/BY#
DQ7
TOEH
TBY
TCE
TOE
DATA
DATA#
FIGURE 9: Data# Polling Timing Diagram
©2010 Silicon Storage Technology, Inc.
17
DATA#
TOES
DATA
1380 F27.0
S71380-04-000
05/10