PIC16LF785-E/SO View Datasheet(PDF) - Microchip Technology
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Description
Manufacturer
PIC16LF785-E/SO Datasheet PDF : 206 Pages
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4.2.3.3 RA2/AN2/T0CKI/INT/C1OUT
Figure 4-3 shows the diagram for this pin. The RA2 pin
is configurable to function as one of the following:
• General purpose I/O
• Analog input for the A/D
• Clock input for TMR0
• External edge triggered interrupt
• Digital output from Comparator 1
FIGURE 4-3:
BLOCK DIAGRAM OF RA2
C1OE
C1OUT
Data Bus
DQ
WR
WPUA
CK Q
RD
WPUA
DQ
WR
PORTA
CK Q
WR
TRISA
DQ
CK Q
RD
TRISA
ANS2
VDD
Weak
RAPU
1
0
ANS2
VDD
I/O pin
VSS
RD
PORTA
DQ
WR
IOCA
CK Q
QD
EN
QD
RD
IOCA
EN Q1
QD
Interrupt-on-
Change
Q3
EN
RD PORTA
To TMR0
To INT
To A/D Converter
PIC16F785/HV785
4.2.3.4 RA3/MCLR/VPP
Figure 4-4 shows the diagram for this pin. The RA3 pin
is configurable to function as one of the following:
• General purpose input
• Master Clear Reset with weak pull-up
FIGURE 4-4:
BLOCK DIAGRAM OF RA3
Data Bus
DQ
WR
WPUA
CK Q
MCLRE
VDD
Weak
RD
WPUA
RAPU
Reset
RD
VSS
TRISA
RD
PORTA
DQ
WR
IOCA
CK Q
RD
IOCA
Interrupt-on-
Change
MCLRE
MCLRE
QD
EN
QD
EN
QD
EN
Input
pin
VSS
Q1
Q3
RD PORTA
© 2008 Microchip Technology Inc.
DS41249E-page 39
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