ST7FDALI View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST7FDALI

8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI, DALI

STMicroelectronics 

ST7DALI

16 IMPORTANT NOTES

16.1 EXECUTION OF BTJX INSTRUCTION

When testing the address $FF with the "BTJT" or

"BTJF" instructions, the CPU may perform an in-

correct operation when the relative jump is nega-

tive and performs an address page change.

To avoid this issue, including when using a C com-

piler, it is recommended to never use address

$00FF as a variable (using the linker parameter for

example).

16.2 ADC CONVERSION SPURIOUS RESULTS

Spurious conversions occur with a rate lower than

50 per million. Such conversions happen when the

measured voltage is just between 2 consecutive

digital values.

Workaround

A software filter should be implemented to remove

erratic conversion results whenever they may

cause unwanted consequences.

16.3 A/ D CONVERTER ACCURACY FOR FIRST

CONVERSION

When the ADC is enabled after being powered

down (for example when waking up from HALT,

ACTIVE-HALT or setting the ADON bit in the AD-

CCSR register), the first conversion (8-bit or 10-

bit) accuracy does not meet the accuracy specified

in the datasheet.

Workaround

In order to have the accuracy specified in the da-

tasheet, the first conversion after a ADC switch-on

has to be ignored.

jection should be prevented by the addition of a

Schottky diode between the concerned I/Os and

ground.

Injecting a negative current on digital input pins

degrades ADC accuracy especially if performed

on a pin close to ADC channel in use.

16.5 CLEARING ACTIVE INTERRUPTS

OUTSIDE INTERRUPT ROUTINE

When an active interrupt request occurs at the

same time as the related flag or interrupt mask is

being cleared, the CC register may be corrupted.

Concurrent interrupt context

The symptom does not occur when the interrupts

are handled normally, i.e. when:

- The interrupt request is cleared (flag reset or in-

terrupt mask) within its own interrupt routine

- The interrupt request is cleared (flag reset or in-

terrupt mask) within any interrupt routine

- The interrupt request is cleared (flag reset or in-

terrupt mask) in any part of the code while this in-

terrupt is disabled

If these conditions are not met, the symptom can

be avoided by implementing the following se-

quence:

Perform SIM and RIM operation before and after

resetting an active interrupt request

Ex:

SIM

reset flag or interrupt mask

RIM

16.4 NEGATIVE INJECTION IMPACT ON ADC

ACCURACY

Injecting a negative current on an analog input

pins significantly reduces the accuracy of the AD

Converter. Whenever necessary, the negative in-

16.6 USING PB4 AS EXTERNAL INTERRUPT

PB4 cannot be used as an external interrupt in

HALT mode because the port pin PB4 is not active

in this mode.

138/141

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