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ST62T03CT6 View Datasheet(PDF) - STMicroelectronics

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Description
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ST62T03CT6 Datasheet PDF : 100 Pages
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ST6200C/ST6201C/ST6203C
OPERATING CONDITIONS (Cont’d)
11.3.2 Operating Conditions with Low Voltage Detector (LVD)
Subject to general operating conditions for VDD, fOSC, and TA.
Symbol
Parameter
Conditions
Min Typ 1) Max Unit
VIT+
VIT-
Vhys
VtPOR
tg(VDD)
Reset release threshold
(VDD rise)
Reset generation threshold
(VDD fall)
LVD voltage threshold hysteresis
VDD rise time rate 2)
Filtered glitch delay on VDD 3)
VIT+-VIT-
Not detected by the LVD
3.9
4.1
4.3
V
3.6
3.8
4
50
300
700
mV
mV/s
30
ns
Notes:
1. LVD typical data are based on TA=25°C. They are given only as design guidelines and are not tested.
2. The minimum VDD rise time rate is needed to insure a correct device power-on and LVD reset. Not tested in production.
3. Data based on characterization results, not tested in production.
Figure 33. LVD Threshold Versus VDD and fOSC3)
fOSC [MHz]
DEVICE UNDER8
RESET
IN THIS AREA 4
FUNCTIONALITY
NOT GUARANTEED
IN THIS AREA
FUNCTIONAL AREA
SUPPLY
0
2.5
3
3.5 VIT-3.6 4
4.5
5
VOLTAGE [V]
5.5
6
Figure 34. Typical LVD Thresholds Versus Figure 35. Typical LVD thresholds vs.
Temperature for OTP devices
Temperature for ROM devices
Thresholds [V]
4.2
4
VVIdTd+ up
3.8
VVIdTd- down
3.6
-40°C
25°C
95°C
T [°C]
125°C
Thresholds [V]
4.2
4
VVITd+d up
3.8
VVITd-d down
3.6
-40°C
25°C
95°C
T [°C]
125°C
61/100
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