M38C22M2DFP View Datasheet(PDF) - MITSUBISHI ELECTRIC

Part Name

Description

Manufacturer

M38C22M2DFP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI ELECTRIC  

PRELIMINARY NSootimcee: pTahriasmisentroict alimfinitsalasrpeescuifbicjeactitotno. change.

MITSUBISHI MICROCOMPUTERS

38C2 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

(2) Asynchronous Serial I/O (UART) Mode

Clock asynchronous serial I/O mode (UART) can be selected by clear-

ing the serial I/O mode selection bit of the serial I/O control register

to “0”.

Eight serial data transfer formats can be selected, and the transfer

formats used by a transmitter and receiver must be identical.

The transmit and receive shift registers each have a buffer, but the

two buffers have the same address in memory. Since the shift regis-

ter cannot be written to or read from directly, transmit data is written

to the transmit buffer register, and receive data is read from the re-

ceive buffer register.

The transmit buffer register can also hold the next data to be trans-

mitted, and the receive buffer register can hold a character while the

next character is being received.

Data bus

P54/RXD1

[P33/RXD2]

P56/SCLK1

[P31/SCLK2]

Address 001C16

[Address 001E16]

Serial I/O control register

Address 0FE016

[Address 0FE316]

OE

Receive buffer register

Receive buffer full flag (RBF)

Character length selection bit

Receive interrupt request (RI)

ST detector 7 bits

Receive shift register

8 bits

1/16

PE FE SP detector

Clock control circuit

Serial I/O synchronous clock selection bit

UART control register

Address 0FE116

[Address 0FE416]

f(XIN)

BRG count source selection bit

(f(XCIN) in low-speed mode)

1/4

Frequency division ratio 1/(n+1)

Baud rate generator

Address 0FE216 [Address 0FE516]

ST/SP/PA generator

1/16

Transmit shift completion flag (TSC)

P55/TXD1

[P32/TXD2]

Transmit shift register

Transmit interrupt source selection bit

Transmit interrupt request (TI)

Character length selection bit

Transmit buffer register

Address 001C16

[Address 001E16]

Data bus

Transmit buffer empty flag (TBE)

Serial I/O status register Address 001D16

[Address 001F16]

[ ] : For Serial I/O2

Fig. 27 Block diagram of UART serial I/O

Transmit or receive clock

Transmit buffer write

signal

TBE=0

TSC=0

TBE=1

Serial output TXD

ST

Receive buffer read

signal

TBE=0

D0

D1

1 start bit

7 or 8 data bit

1 or 0 parity bit

1 or 2 stop bit (s)

Serial input RXD

ST

D0

D1

TBE=1

SP

ST

D0

TSC=1✽

D1

SP

✽

Generated at 2nd bit in 2-stop-bit mode

RBF=1

SP

ST

RBF=0

D0

D1

RBF=1

SP

Notes 1: Error flag detection occurs at the same time that the RBF flag becomes “1” (at 1st stop bit, during reception).

2: As the transmit interrupt (TI), when either the TBE or TSC flag becomes “1,” can be selected to occur depending on the setting of the transmit

interrupt source selection bit (TIC) of the serial I/O control register.

3: The receive interrupt (RI) is set when the RBF flag becomes “1.”

4: After data is written to the transmit buffer when TSC=1, 0.5 to 1.5 cycles of the data shift cycle is necessary until changing to TSC=0.

Fig. 28 Operation of UART serial I/O function

31

Share Link: