PIC32MX230F064C-I/TL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC32MX230F064C-I/TL

32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

Microchip Technology 

TABLE 4-10: DMA GLOBAL REGISTER MAP(1)

Bits

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

31:16 —

—

—

—

—

—

—

—

—

—

—

—

—

—

—

— 0000

3000 DMACON

15:0 ON

—

— SUSPEND DMABUSY —

—

—

—

—

—

—

—

—

—

— 0000

31:16 —

—

—

—

—

—

—

—

—

—

—

—

—

—

—

— 0000

3010 DMASTAT

15:0 —

—

—

—

—

—

—

—

—

—

—

—

RDWR

DMACH<2:0>(2)

0000

31:16

3020 DMAADDR

15:0

DMAADDR<31:0>

0000

0000

Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1:

All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for more

information.

TABLE 4-11: DMA CRC REGISTER MAP(1)

Bits

31/15 30/14 29/13 28/12 27/11 26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

31:16 —

—

BYTO<1:0>

WBO

—

—

BITO

—

—

—

—

—

—

—

— 0000

3030 DCRCCON

15:0

—

—

—

PLEN<4:0>

CRCEN CRCAPP CRCTYP —

—

CRCCH<2:0>

0000

31:16

3040 DCRCDATA

15:0

DCRCDATA<31:0>

0000

0000

31:16

3050 DCRCXOR

15:0

DCRCXOR<31:0>

0000

0000

Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1:

All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for

more information.

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