PIC32MX230F064C-I/TL View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC32MX230F064C-I/TL
Microchip Technology
PIC32MX230F064C-I/TL Datasheet PDF : 321 Pages
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PIC32MX1XX/2XX
REGISTER 5-2: NVMKEY: PROGRAMMING UNLOCK REGISTER(1)
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2
W-0
W-0
W-0
W-0
W-0
W-0
31:24
NVMKEY<31:24>
W-0
W-0
W-0
W-0
W-0
W-0
23:16
NVMKEY<23:16>
W-0
W-0
W-0
W-0
W-0
W-0
15:8
NVMKEY<15:8>
W-0
W-0
W-0
W-0
W-0
W-0
7:0
NVMKEY<7:0>
Bit
25/17/9/1
W-0
W-0
W-0
W-0
Bit
24/16/8/0
W-0
W-0
W-0
W-0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-0 NVMKEY<31:0>: Unlock Register bits
These bits are write-only, and read as ‘0’ on any read
Note 1: This register is used as part of the unlock sequence to prevent inadvertent writes to the PFM.
REGISTER 5-3: NVMADDR: FLASH ADDRESS REGISTER
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3
31:24
23:16
15:8
7:0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
NVMADDR<31:24>
R/W-0
R/W-0
NVMADDR<23:16>
R/W-0
R/W-0
NVMADDR<15:8>
R/W-0
R/W-0
NVMADDR<7:0>
Bit
26/18/10/2
R/W-0
R/W-0
R/W-0
R/W-0
Bit
25/17/9/1
R/W-0
R/W-0
R/W-0
R/W-0
Bit
24/16/8/0
R/W-0
R/W-0
R/W-0
R/W-0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-0
NVMADDR<31:0>: Flash Address bits
Bulk/Chip/PFM Erase: Address is ignored.
Page Erase: Address identifies the page to erase.
Row Program: Address identifies the row to program.
Word Program: Address identifies the word to program.
© 2011 Microchip Technology Inc.
Preliminary
DS61168C-page 81
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