STM32F302xx/STM32F303xx
Electrical characteristics
Figure 33. Typical connection diagram using the ADC
RAIN(1)
AINx
VAIN
Cparasitic
6$$!
VT
0.6 V
VT
0.6 V
IL±1 μA
Sample and hold ADC
converter
RADC
12-bit
converter
CADC
-36
1. Refer to Table 66 for the values of RAIN.
2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy
this, fADC should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 11. The 10 nF capacitor
should be ceramic (good quality) and it should be placed as close as possible to the chip.
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