STM32F302XB View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F302XB

ARM Cortex-M4F 32b MCU+FPU, up to 256KB Flash+48KB SRAM 4 ADCs, 2 DAC ch., 7 comp, 4 PGA, timers, 2.0-3.6 V operation

STMicroelectronics 

STM32F302xx/STM32F303xx

Functional overview

3.7

3.7.1

3.7.2

3.7.3

Power management

Power supply schemes

● VSS, VDD = 2.0 to 3.6 V: external power supply for I/Os and the internal regulator. It is

provided externally through VDD pins

● VSSA, VDDA = 2.0 to 3.6 V: external analog power supply for ADC, DACs, comparators

operational amplifiers, reset blocks, RCs and PLL (minimum voltage to be applied to

VDDA is 2.4 V when the DACs and operational amplifiers are used). The VDDA voltage

level must be always greater or equal to the VDD voltage level and must be provided

first.

● VBAT = 1.65 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup

registers (through power switch) when VDD is not present.

Power supply supervisor

The device has an integrated power-on reset (POR) and power-down reset (PDR) circuits.

They are always active, and ensure proper operation above a threshold of 2 V. The device

remains in reset mode when the monitored supply voltage is below a specified threshold,

VPOR/PDR, without the need for an external reset circuit.

● The POR monitors only the VDD supply voltage. During the startup phase it is required

that VDDA should arrive first and be greater than or equal to VDD.

● The PDR monitors both the VDD and VDDA supply voltages, however the VDDA power

supply supervisor can be disabled (by programming a dedicated Option bit) to reduce

the power consumption if the application design ensures that VDDA is higher than or

equal to VDD.

The device features an embedded programmable voltage detector (PVD) that monitors the

VDD power supply and compares it to the VPVD threshold. An interrupt can be generated

when VDD drops below the VPVD threshold and/or when VDD is higher than the VPVD

threshold. The interrupt service routine can then generate a warning message and/or put

the MCU into a safe state. The PVD is enabled by software.

Voltage regulator

The regulator has three operation modes: main (MR), low power (LPR), and power-down.

● The MR mode is used in the nominal regulation mode (Run)

● The LPR mode is used in Stop mode.

● The power-down mode is used in Standby mode: the regulator output is in high

impedance, and the kernel circuitry is powered down thus inducing zero consumption.

The voltage regulator is always enabled after reset. It is disabled in Standby mode.

Doc ID 023353 Rev 5

15/133

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