M29W641DL12N6T View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M29W641DL12N6T

64 Mbit (4Mb x16, Uniform Block) 3V Supply Flash Memory

STMicroelectronics 

M29W641DH, M29W641DL, M29W641DU

REVISION HISTORY

Table 26. Document Revision History

Date

Version

Revision Details

30-Apr-2002

-01

Document released

When in Extended Block mode, the block at the boot block address can be used as OTP.

Data Toggle Flow chart corrected. Double Word Program Time (typ) changed to 20s.

05-Sep-2002

1.1

Revision numbering modified: a minor revision will be indicated by incrementing the digit

after the dot, and a major revision, by incrementing the digit before the dot (revision

version 01 equals 1.0).

8-Apr-2003

New Part Numbers added. 100ns and 120ns Speed Classes added. TFBGA63 package

added. VIO removed from and VCCQ added to Table 6, Absolute Maximum Ratings. VCCQ

added to Table 7, Operating and AC Measurement Conditions. Ready/Busy pin

(TFBGA63 package) added to the signals (concerns M29W641DU only).

Figure 7, AC Measurement I/O Waveform, and Figure 8, AC Measurement Load Circuit,

modified. Unlock Bypass Commands clarified and VCCQ description specified in SIGNAL

DESCRIPTIONS section. Test Conditions modified for ILI, ILO, VIL, VIH, VOL and VOH

parameters in Table 9, DC Characteristics, and VIL, VIH, VOL and VOH parameters

corrected. tWLWH, tDVWH, tWLAX, tWHRL parameters modified for 90ns speed class in Table

11, Write AC Characteristics, Write Enable Controlled. tELEH, tDVEH, tELAX and tEHRL

2.0

parameters modified for 90ns speed class in Table 12, Write AC Characteristics, Chip

Enable Controlled. tPLYH parameter added to Table 13, Reset/Block Temporary Unprotect

AC Characteristics.

Data and Value modified for address 2Dh, and Data modified for address 30h in Table 21,

Device Geometry Definition. Description modified at address offset 4Eh in Table 22.

Data Retention and Erase Suspend Latency Time parameters added to Table 6, Program,

Erase Times and Program, Erase Endurance Cycles, and Typical after 100k W/E Cycles

column removed. IID (Identification) current removed from Table 9, DC Characteristics.

Lead-free package options E and F added to Table 16, Ordering Information Scheme.

Appendix C, EXTENDED MEMORY BLOCK, added. VSS pin connection to ground

clarified. Auto Select Command is used to read the Extended Memory Block. Note added

to Table 16, Ordering Information Scheme.

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