ST72F324J2TCRS View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72F324J2TCRS

8-bit MCU for automotive, 3.8 to 5.5V operating range with 8 to 32 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI

STMicroelectronics 

ST72324xx-Auto

On-chip peripherals

Figure 46. Pulse width modulation mode timing example with two output compare

functions(1)

Counter 34E2 FFFC FFFD FFFE

OCMP1

compare2

OLVL2

2ED0 2ED1 2ED2

34E2 FFFC

OLVL1

compare1

OLVL2

compare2

1. OC1R = 2ED0h, OC2R = 34E2, OLVL1 = 0, OLVL2 = 1

Pulse Width Modulation mode

t(s) Pulse Width Modulation (PWM) mode enables the generation of a signal with a frequency

c and pulse length determined by the value of the OC1R and OC2R registers.

u Pulse Width Modulation mode uses the complete Output Compare 1 function plus the

rod OC2R register, and so this functionality can not be used when PWM mode is activated.

P In PWM mode, double buffering is implemented on the output compare registers. Any new

te values written in the OC1R and OC2R registers are taken into account only at the end of the

PWM period (OC2) to avoid spikes on the PWM output pin (OCMP1).

ole Procedure

bs To use Pulse Width Modulation mode:

O 1. Load the OC2R register with the value corresponding to the period of the signal using

- the formula below.

t(s) 2. Load the OC1R register with the value corresponding to the period of the pulse if

(OLVL1 = 0 and OLVL2 = 1) using the formula in the opposite column.

c 3. Select the following in the CR1 register:

du – Using the OLVL1 bit, select the level to be applied to the OCMP1 pin after a

ro successful comparison with the OC1R register.

P– Using the OLVL2 bit, select the level to be applied to the OCMP1 pin after a

te successful comparison with the OC2R register.

le4. Select the following in the CR2 register:

o – Set OC1E bit: the OCMP1 pin is then dedicated to the output compare 1 function.

bs – Set the PWM bit.

O – Select the timer clock (CC[1:0]) (see Table 50).

Doc ID 13841 Rev 1

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