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ST72F324J2TATR View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
ST72F324J2TATR Datasheet PDF : 194 Pages
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On-chip peripherals
ST72324xx-Auto
Alternate Counter Low Register (ACLR)
This is an 8-bit register that contains the low part of the counter value. A write to this register
resets the counter. An access to this register after an access to CSR register does not clear
the TOF bit in the CSR register.
ACLR
Reset value: 1111 1100 (FCh)
7
6
5
4
3
2
1
0
MSB
LSB
RO
RO
RO
RO
RO
RO
RO
RO
Obsolete Product(s) Note:
Obsolete Product(s) - Note:
Input Capture 2 High Register (IC2HR)
This is an 8-bit register that contains the high part of the counter value (transferred by the
Input Capture 2 event).
1C2HR
Reset value: undefined
7
6
5
4
3
2
1
0
MSB
LSB
RO
RO
RO
RO
RO
RO
RO
RO
In Flash devices, this register is not implemented for Timer A.
Input Capture 2 Low Register (IC2LR)
This is an 8-bit register that contains the low part of the counter value (transferred by the
Input Capture 2 event).
1C2LR
Reset value: undefined
7
6
5
4
3
2
1
0
MSB
LSB
RO
RO
RO
RO
RO
RO
RO
RO
In Flash devices, this register is not implemented for Timer A.
Table 52. 16-bit timer register map and reset values
Address
(Hex.)
Register
label
7
6
5
4
3
Timer A: 32
Timer B: 42
Timer A: 31
Timer B: 41
CR1
Reset value
CR2
Reset value
ICIE
0
OC1E
0
OCIE
0
OC2E(1)
0
TOIE
0
OPM
0
FOLV2(1) FOLV1
0
0
PWM
0
CC1
0
2
1
0
OLVL2
0
CC0
0
IEDG1 OLVL1
0
0
IEDG2(1) EXEDG
0
0
96/193
Doc ID 13841 Rev 1

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