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UPSD3212C-40U6 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
UPSD3212C-40U6 Datasheet PDF : 163 Pages
First Prev 131 132 133 134 135 136 137 138 139 140 Next Last
uPSD3212A, uPSD3212C, uPSD3212CV
Figure 71. External Program Memory READ Cycle
tLHLL
tLLPL
ALE
PSEN
PORT 0
PORT 2
tAVLL
tPLPH
tLLIV
tPLIV
tLLAX
A0-A7
tAZPL
tAVIV
A8-A11
INSTR
IN
tPXAV
tPXIZ
tPXIX
A0-A7
A8-A11
AI06848
Table 116. External Program Memory AC Characteristics (with the 5V MCU Module)
Symbol
Parameter(1)
40MHz Oscillator
Min
Max
Variable Oscillator
1/tCLCL = 24 to 40MHz
Unit
Min
Max
tLHLL
ALE pulse width
35
2tCLCL – 15
ns
tAVLL
Address set up to ALE
10
tCLCL – 15
ns
tLLAX
Address hold after ALE
10
tCLCL – 15
ns
tLLIV
ALE Low to valid instruction in
55
4tCLCL – 45 ns
tLLPL
ALE to PSEN
10
tCLCL – 15
ns
tPLPH
PSEN pulse width
60
3tCLCL – 15
ns
tPLIV
PSEN to valid instruction in
30
3tCLCL – 45 ns
tPXIX
Input instruction hold after PSEN
0
0
ns
tPXIZ(2) Input instruction float after PSEN
15
tCLCL – 10 ns
tPXAV(2) Address valid after PSEN
20
tCLCL – 5
ns
tAVIV
Address to valid instruction in
70
5tCLCL – 55 ns
tAZPL
Address float to PSEN
–5
–5
ns
Note: 1. Conditions (in addition to those in Table 109., page 133, VCC = 4.5 to 5.5V): VSS = 0V; CL for Port 0, ALE and PSEN output is 100pF;
CL for other outputs is 80pF
2. Interfacing the uPSD321x Devices to devices with float times up to 20ns is permissible. This limited bus contention does not cause
any damage to Port 0 drivers.
140/163

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