STM632x, STM682x
DC and AC parameters
Table 6. DC and AC characteristics (continued)
Sym- Alter-
bol native
Description
Test condition(1)
Min. Typ. Max. Unit
Reset threshold
temperature coefficient
40
ppm/
C
Push-button reset input
tMLMH
tMLRL
tMR
tMRD
MR pulse width
MR to RST output delay
MR glitch immunity
MR pull-up resistor
1
µs
500
ns
100
ns
35
52
75
kΩ
Watchdog timer
tWD (6)
Watchdog timeout period
WDI pulse width(7)
VCC ≥ 3.0 V
1.12 1.60 2.24 s
50
ns
1.
Valid for ambient
“T/S/R” versions;
oapnedrVatCinCg=te1m.2pteora2t.u7r5e:VTfAor=“Z–4/Y0”
tvoe8rs5io°nC;(eVxCcCep=t
4.5 to 5.5 V for
where noted).
“L/M”
versions;
VCC
=
2.7
to
3.6
V
for
2. VCC (min.) = 1.0 V for TA = 0 to +85 °C.
3. WDI input is designed to be driven by a three-state output device. To float WDI, the “high-impedance mode” of the output
device must have a maximum leakage current of 10 µA and a maximum output capacitance of 200 pF. The output device
must also be able to source and sink at least 200 µA when active.
4. WDI is internally serviced within the watchdog period if WDI is left unconnected.
5. The leakage current measured on the RST pin is tested with the reset asserted (output high impedance).
6.
Other
office
ftorercaovfafeilraebdiliftoyr.
tWD
(102
ms,
6.3
ms,
and
25.6
s
options).
Minimum
order
quantities
may
apply.
Contact
local
sales
7. For VCC < 3.0 V, tWD(min.) = 100 ns.
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