NXP Semiconductors
13. Test information
GTL2007
12-bit GTL to LVTTL translator with power good control
PULSE
VI
GENERATOR
VCC
VO
DUT
RT
Fig 10. Load circuit for A outputs
CL
50 pF
RL
500 Ω
002aab006
VTT
PULSE
VI
GENERATOR
VCC
VO
DUT
50 Ω
RT
CL
30 pF
Fig 11. Load circuit for B outputs
002aab264
PULSE
GENERATOR
VCC
VI
VO
DUT
RT
VCC
RL
1.5 kΩ
CL
21 pF
002aab265
RL = load resistor.
CL = load capacitance; includes jig and probe capacitance.
RT = termination resistance; should be equal to Zo of pulse generators.
Fig 12. Load circuit for open-drain LVTTL I/O
GTL2007_2
Product data sheet
Rev. 02 — 16 February 2007
© NXP B.V. 2007. All rights reserved.
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