QL82SD-6PS484M View Datasheet(PDF) - QuickLogic Corporation

Part Name

Description

Manufacturer

QL82SD-6PS484M

LVDS SERDES, flexible programmable logic, dual port SRAM.

QuickLogic Corporation 

QL82SD Device Data Sheet Rev C

Pad_Clkx_p/n

t RXD [1] max

t RXD [1] min

t RXD [0] max

t RXD [0] min

SerialClock

(Internal)

t SCD

Pad_Chx_p/n

t RXDS

t RXDH

t RCP

t SCP

Strobe

[bit3] [bit2] [bit1] [bit0] [bit7] [bit6] [bit5] [bit4]

Chx_rxd [7:0]

Note: t RXD [N-1] denotes

physical strobe positions

wrt Pad_ClkX_p/n while

Pad_ChX_p/n bit[n] refers

to logical bit positions

wrt ChX_rxd [7:0].

Chx_rxclk

t DD

t RXPD

Figure 26: Channel Link Mode Deserializer Receive (Using 8:1 Mode as Example)

Ch0_txd [0]

Pad_Ch0_p/n

tASD

ClkA_txclk

Pad_ClkA_p/n

tASC

Figure 27: 1:1 Mode Asynchronous Level Conversion Mode Deserializer Delays

SERDES Bit Error Rate

The following table indicates the SERDES bit error rate at TA = 25° C and

PLLVcc = 2.5 V unless otherwise specified.

Table 18: Serializer/Deserializer Bit Error Rate

Modes

10:1

Bit Error Rate

< 1 x 10-12

8:1

< 1 x 10-12

7:1

< 1 x 10-12

4:1

< 1 x 10-12

•

20

•

•

•

www.quicklogic.com

•

•

Preliminary

© 2002 QuickLogic Corporation

Share Link: