QL82SD-6PS484M View Datasheet(PDF) - QuickLogic Corporation

Part Name

Description

Manufacturer

QL82SD-6PS484M

LVDS SERDES, flexible programmable logic, dual port SRAM.

QuickLogic Corporation 

QL82SD Device Data Sheet Rev C

Dedicated Clock

There is one dedicated clock in QuickSD devices. It connects to the clock input of the

SuperCell, I/O, and RAM registers through a hardwired connection and is multiplexed with

the programmable clock input. There are four inversions from pad to register inputs and the

dedicated clock takes on the same configuration as the global clock. The dedicated clock

provides a fast global network with low skew. You can select either the dedicated clock or the

programmable clock; Figure 50 gives the dedicated clock circuitry within the logic cell.

Programmable clock

Hard-wired clock

CLK

Figure 50: Dedicated Clock Circuitry

The performance of the dedicated clock is given in Table 32

Table 32: Dedicated Clock Performance

Clock Performance

TT, 25C, 2.5 V

Global

Dedicated

Macro (rear)

1.51

1.59

I/O (far)

2.06

1.73

Skew

0.55

0.14

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Preliminary

© 2002 QuickLogic Corporation

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