Data Sheet
THEORY OF OPERATION
BLOCK DIAGRAM
ADP1878/ADP1879
ADP1878/ADP1879
690mV
FB
600mV
530mV
PGOOD
tON TIMER
VREG
VIN
EN
VREG
PRECISION
ENABLE
630mV
THRESHOLD/
HYSTERESIS
LDO
TO ENABLE
ALL BLOCKS
C
I
SW
INFORMATION
R (TRIMMED)
tON = 2RC(VOUT/VIN)
SS
COMP
FB
REF
SW FILTER
BIAS BLOCK
AND REFERENCE
REF_ZERO
ISS
SS
COMP
PSM
SS_REF
ERROR
AMP
0.6V
LOWER
COMP
CLAMP
REF_ZERO
PWM
CS
AMP
IREV
COMP
CS GAIN SET
VREG
STATE
MACHINE
TON
BG_REF
IN_PSM HS_0
IN_SS
HS
IN_HICCUP
SW
COMP
PWM
IREV
LS
LS_0
LEVEL
SHIFT
ADC
RES DETECT AND
GAIN SET
0.4V
300kΩ
HS
VREG
LS
8kΩ
800kΩ
BST
DRVH
SW
DRVL
PGND
GND
RES
Figure 64. ADP1878/ADP1879 Block Diagram
The ADP1878/ADP1879 are versatile current-mode, synchronous
step-down controllers that provide superior transient response,
optimal stability, and current-limit protection by using a constant
on time, pseudo fixed frequency with a programmable current
sense gain, current control scheme. In addition, these devices offer
optimum performance at low duty cycles by using a valley, current-
mode control architecture. This allows the ADP1878/ADP1879
to drive all N-channel power stages to regulate output voltages
to as low as 0.6 V.
Rev. A | Page 17 of 40