ADP1878ACPZ-0.6-R7(RevA) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADP1878ACPZ-0.6-R7
(Rev.:RevA)

Synchronous Buck Controller with Constant On Time and Valley Current Mode

Analog Devices 

Data Sheet

ADP1878/ADP1879

LAYOUT CONSIDERATIONS

The performance of a dc-to-dc converter depends highly on

Figure 86 shows the schematic of a typical ADP1878/ADP1879

how the voltage and current paths are configured on the printed

used for a high current application. Blue traces denote high current

circuit board (PCB). Optimizing the placement of sensitive

analog and power components are essential to minimize output

pathways. VIN, PGND, and VOUT traces should be wide and

possibly replicated, descending down into the multiple layers.

ripple, maintain tight regulation specifications, and reduce

Vias should populate, mainly around the positive and negative

PWM jitter and electromagnetic interference.

terminals of the input and output capacitors, alongside the source

of Q1/Q2, the drain of Q3/Q4, and the inductor.

HIGH VOLTAGE INPUT

VIN = 12V

JP3

CVIN

22µF

C3

C4

C5

C6

C7

C8

C9

22µF 22µF 22µF 22µF 22µF

N/A

N/A

CPAR

53pF

CC

430pF

RC

57kΩ

VREG

VOUT

R7 10kΩ

RTOP 2kΩ

RBOT

1kΩ

C2

0.1µF

RRES

100kΩ

C1

1µF

1

ADP1878/

ADP1879

VIN

BST

14

CBST

100nF

Q1

2 COMP

SW 13

3 EN

DRVH 12

4 FB

PGND 11

Q3

5 GND

6 RES

DRVL 10

5kΩ

PGOOD 9

VREG

7 VREG

SS 8

CSS

34nF

Q2

1.0µH

VOUT = 1.8V, 15A

RSNB

Q4

2Ω

CSNB

1.5nF

C20 + C21 + C22 + C23 +

270µF 270µF 270µF 270µF

C24 + C25 + C26 + C27 + C14 TO C19

N/A

N/A

N/A

N/A N/A

MURATA: (HIGH VOLTAGE INPUT CAPACITORS)

22µF, 25V, X7R, 1210 GRM32ER71E226KE15L

PANASONIC: (OUTPUT CAPACITORS)

270µF, SP-SERIES, 4V, 7mΩ, EEFUE0G271LR

INFINEON FETs:

BSC042N03MS G (LOWER SIDE)

BSC080N03MS G (UPPER SIDE)

WÜRTH INDUCTORS:

1µH, 3.8mΩ, 16A, 7443552100

Figure 86. ADP1878 High Current Evaluation Board Schematic (Blue Traces Indicate High Current Paths)

SENSITIVE ANALOG

COMPONENTS

LOCATED FAR

FROM NOISY

POWER SECTION

SEPARATE ANALOG

GROUND PLANE FOR

COMPENSATION AND

FEEDBACK RESISTORS

INPUT CAPACITORS

ARE MOUNTED CLOSE

TO DRAIN OF Q1/Q2

AND SOURCE OF Q3/Q4

OUTPUT

CAPACITORS

ARE MOUNTED

AT RIGHTMOST

AREA OF

EVALUATION

BOARD

Figure 87. Overall Layout of the ADP1878/ADP1879 High Current Evaluation Board

Rev. A | Page 33 of 40

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