ADV7403
PIXEL INPUT/OUTPUT FORMATTING
Table 9. SDP, CP Pixel Input/Output Pin Map (P19 to P0)
Processor, Format,
Pixel Port Pins P[19:0]
and Mode
19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2
SDP
Video out, 8-bit,
4:2:2
YcrCb[7:0]OUT
-- - - - - - - --
SDP
Video out, 10-bit,
4:2:2
YcrCb[9:0] OUT
- - - - -- --
SDP
Video out,
16-bit, 4:2:2
Y[7:0]OUT
--
CrCb[7:0]OUT
SDP
Video out,
20-bit, 4:2:2
Y[9:0]OUT
CrCb[9:0]OUT
SDP
Video out,
24-bit, 4:4:4
Y[7:0]OUT
--
Cb[7:0]OUT
SDP
Video out,
30-bit, 4:4:4
Y[9:0]OUT
Cb[9:0]OUT
SM-SDP Digital tuner
input[1]
Output choices are the same as video out 16-/20-bit or pseudo 8-/10-bit DDR
CP
8-bit, 4:2:2, DDR D7 D6 D5 D4 D3 D2 D1 D0 - - - - - - - - - -
CP
10-bit, 4:2:2, DDR D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 - - - - - - - -
CP
12-bit, 4:4:4, RGB D7 D6 D5 D4 D3 D2 D1 D0 - - D11 D10 D9 D8 - - - -
DDR
CP
Video out,
16-bit, 4:2:2
CHA[7:0]OUT (for example, Y[7:0])
--
CHB/C[7:0]OUT (for example, Cr/Cb[7:0])
CP
Video out,
20-bit, 4:2:2
CHA[9:0]OUT (for example, Y[9:0])
CHB/C[9:0]OUT (for example, Cr/Cb[9:0])
CP
Video out,
24-bit, 4:4:4
CHA[7:0]OUT (for example, G[7:0])
--
CHB[7:0]OUT (for example, B[7:0])
CP
Video out,
30-bit, 4:4:4
CHA[9:0]OUT (for example, G[9:0])
CHB[9:0]OUT (for example, B[9:0])
SM-CP
HDMI receiver
support, 24-bit,
4:4:4 input
CHA[7:0]OUT (for example, Y[7:0])
R[5:4]IN
CHB/C[7:0]OUT (for example, Cr/Cb[7:0])
SM-CP
HDMI receiver
support 16-bit
pass-through
CHA[7:0]OUT (for example, Y[7:0])
--
CHB/C[7:0]OUT (for example, Cr/Cb[7:0])
SM-CP
HDMI receiver
support, 20-bit,
pass-through
CHA[9:0]OUT (for example, Y[9:0])
CHB/C[9:0]OUT (for example, Cr/Cb[9:0])
10
--
--
--
--
--
--
--
--
--
R[1:0]IN
--
Rev. SpA | Page 17 of 24