Data Sheet
ADV7403
Table 10. SDP, CP Pixel Input/Output Pin Map (P40 to P20)
Pixel Port Pins P[40:31], P[29:20]
Processor Mode Format
40 39 38 37 36 35 34 33 32 31 29 28 27 26 25 24 23 22 21 20
SDP
Video out, 8-bit, 4:2:2
SDP
Video out, 10-bit, 4:2:2
SDP
Video out, 16-bit, 4:2:2
SDP
Video out, 20-bit, 4:2:2
SDP
Video out, 24-bit, 4:4:4
Cr[7:0]OUT
SDP
Video out, 30-bit, 4:4:4
Cr[9:0]OUT
SM-SDP
Digital tuner input[1]
DCVBS[9:0]IN
CP
8-bit, 4:2:2, DDR
CP
10-bit, 4:2:2, DDR
CP
CP
CP
CP
CP
SM-CP
SM-CP
SM-CP
12-bit, 4:4:4, RGB DDR
Video out, 16-bit, 4:2:2
Video out, 20-bit, 4:2:2
Video out, 24-bit, 4:4:4
input
Video out, 30-bit, 4:4:4
input
HDMI receiver support,
24-bit, 4:4:4 input
HDMI receiver support,
16-bit, pass through
HDMI receiver support,
20-bit, pass through
CHC[7:0]OUT (for example, R[7:0])
CHC[9:0]OUT (for example, R[9:0])
G[7:0]IN
R[7:6]IN
B[7:0]IN
R[3:2]IN
CHA[7:0]IN(for example, Y[7:0])
CHB/C[7:0]IN(for example, Cr/Cb[7:0])
CHA[9:0]IN(for example, Y[9:0])
CHB/C[9:0]IN(for example, Cr/Cb[9:0])
Rev. B | Page 17 of 20