ST72325S6B5(2007) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72325S6B5
(Rev.:2007)

8-bit MCU with 16 to 60K Flash/ROM, ADC, CSS, 5 timers, SPI, SCI, I2C interface

STMicroelectronics 

12.8 I/O PORT PIN CHARACTERISTICS

12.8.1 General Characteristics

Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

VIL

Input low level voltage 1)

VIH Input high level voltage 1)

CMOS ports

Vhys Schmitt trigger voltage hysteresis 2)

0.7xVDD

0.7

Injected Current on PB0 (Flash de-

IINJ(PIN)3) vices only)

0

Injected Current on an I/O pin

VDD=5V

ΣIINJ(PIN)3)

Total injected current (sum of all I/O

and control pins)

IL

Input leakage current

VSS≤VIN≤VDD

IS

Static current consumption

Floating input mode4)

RPU Weak pull-up equivalent resistor 5) VIN=VSS

VDD=5V

400

50

120

CIO I/O pin capacitance

5

tf(IO)out Output high to low level fall time 1) CL=50pF

25

tr(IO)out Output low to high level rise time 1) Between 10% and 90%

25

tw(IT)in External interrupt pulse time 6)

1

Max

0.3xVDD

Unit

V

+4

±4

± 25

±1

250

mA

µA

kΩ

pF

ns

tCPU

Figure 80. Unused I/Os configured as input

VDD

10kΩ

ST7XXX

UNUSED I/O PORT

10kΩ

UNUSED I/O PORT

ST7XXX

Figure 81. Typical IPU vs. VDD with VIN=VSS

90

80

T a= 1 40°C

T a= 9 5°C

70

T a= 2 5°C

60

Ta=-45 °C

50

40

30

20

Note: I/O can be left unconnected if it is configured as output

(0 or 1) by the software. This has the advantage of

greater EMC robustness and lower cost.

10

0

2 2 .5 3 3 .5 4 4 .5 5 5 .5 6

V dd(V )

Notes:

1. Data based on characterization results, not tested in production.

2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.

3. When the current limitation is not possible, the VIN maximum must be respected, otherwise refer to IINJ(PIN) specifica-

tion. A positive injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. Refer to section 12.2.2

on page 143 for more details.

4. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for

example and leaving the I/O unconnected on the board or an external pull-up or pull-down resistor (see Figure 80). Static

peak current value taken at a fixed VIN value, based on design simulation and technology characteristics, not tested in

production. This value depends on VDD and temperature values.

5. The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current characteristics de-

scribed in Figure 81).

6. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external

interrupt source.

159/196

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