STM32WB55RGV7TR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STM32WB55RGV7TR
STMicroelectronics
STM32WB55RGV7TR Datasheet PDF : 193 Pages
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STM32WB55xx STM32WB35xx
Functional overview
3.6.3
802.15.4 general description
The STM32WB55xx and STM32WB35xx embed a dedicated 802.15.4 hardware MAC:
Support for 802.15.4 release 2011
Advanced MAC frame filtering; hardwired firewall: Programmable filters based on
source/destination addresses, frame version, security enabled, frame type
256-byte RX FIFO; Up to 8 frames capacity, additional frame information (timing, mean
RSSI, LQI)
128-byte TX FIFO with retention
– Content not lost, retransmissions possible under CPU2 control
Automatic frame acknowledgment, with programmable delay
Advanced channel access features
– Full CSMA-CA support
– Superframe timer
– Beaconing support (require LSE)
– Flexible TX control with programmable delay
Configuration registers with retention available down to Standby mode for
software/auto-restore
Autonomous sniffer, Wakeup based on timer or CPU2 request
Automatic frame transmission/reception/sleep periods, Interrupt to the CPU2 on
particular events
3.6.4
RF pin description
The RF block contains dedicated pins, listed in Table 4.
:
Table 4. RF pin list
Name
Type
Description
RF1
RF Input/output, must be connected to the antenna through a low-pass matching network
OSC_OUT
OSC_IN
I/O 32 MHz main oscillator, also used as HSE source
RF_TX_
MOD_EXT_PA
External PA transmit control
VDDRF
VSSRF(1)
VDD Dedicated supply, must be connected to VDD
VSS To be connected to GND
1. On packages with exposed pad, this pad must be connected to GND plane for correct RF operation.
3.6.5
Typical RF application schematic
The schematic in Figure 4 and the external components listed in Table 4 are purely
indicative. For more details refer to the “Reference design” provided in separate documents.
DS11929 Rev 10
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