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STM32WB55RCU6TR View Datasheet(PDF) - STMicroelectronics

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Description
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STM32WB55RCU6TR Datasheet PDF : 193 Pages
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Functional overview
STM32WB55xx STM32WB35xx
having three independent outputs for the highest flexibility, can generate independent
clocks for the ADC, the RNG and the SAI.
ï‚· Startup clock: after reset, the microcontroller restarts by default with an internal 4 MHz
clock (MSI). The prescaler ratio and clock source can be changed by the application
program as soon as the code execution starts.
ï‚· Clock security system (CSS): this feature can be enabled by software. If an HSE
clock failure occurs, the master clock is automatically switched to HSI16 and a software
interrupt is generated if enabled. LSE failure can also be detected and an interrupt
generated.
ï‚· Clock-out capability:
– MCO: microcontroller clock output: it outputs one of the internal clocks for
external use by the application. Low frequency clocks (LSIx, LSE) are available
down to Stop 1 low power state.
– LSCO: low speed clock output: it outputs LSI or LSE in all low-power modes
down to Standby.
Several prescalers allow the user to configure the AHB frequencies, the high speed APB
(APB2) and the low speed APB (APB1) domains. The maximum frequency of the AHB and
the APB domains is 64 MHz.
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DS11929 Rev 10

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