STM32WB35RCQ6TR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STM32WB35RCQ6TR
STMicroelectronics
STM32WB35RCQ6TR Datasheet PDF : 193 Pages
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STM32WB55xx STM32WB35xx
Functional overview
Figure 9. Clock tree
LSI1 RCC 32 kHz
LSI
to IWDG
LSCO
LSI2 RCC 32 kHz
OSC32_OUT
OSC32_IN
LSE OSC
32.768 kHz
LSE CSS
MCO
/1 - 16
OSC_OUT
OSC_IN
HSE OSC
32 MHz
HSE CSS
HSI16 RC
16 MHz
MSI RC
100 kHz - 48 MHz
HSI48 RC
48 MHz
/M
LSI1
LSI2
LSE
HSE
SYSCLK
PLLRCLK
HSI16
MSI
RC48
MSI
HSI16
LSI
LSE
LSE
to RTC and LCD(1)
to BLE wakeup
to 802.15.4 wakeup
/32
/32
CPU1
HPRE
/1,2,...,512
HCLK1 to CPU1, AHB1, AHB2, AHB3, and SRAM1
to CPU1 FCLK
to CPU1 system timer
/8
SYS clock
source control
PLLRCLK
HSI16
HSE HSEPRE/1,2
MSI
SYSCLK
CPU2
C2HPRE
1,2,...,512
HCLK2
AHB4
SHDHPRE
/1,2,...,512
HCLK4
HSI16
HSE /2
HCLK5
APB1
PPRE1
/1,2,4,8,16
PCLK1
x1 or
x2
to APB1
to APB1 TIMx
APB2
PPRE2
/1,2,4,8,16
/8
PCLK2
to APB2
x1 or
x2
to APB2 TIMx
to CPU2
to CPU2 FCLK
to CPU2 system timer
to AHB4, Flash memory, SRAM2
to APB3
to AHB5
to RF
PLL
xN
/P
/Q
/R
PLLPCLK
PLLQCLK
PLLRCLK
PLLSAI1
xN
/P
/Q
/R
PLLSAI1PCLK
PLLSAI1QCLK
PLLSAI1RCLK
MSI
HSI48
HSI16
SAI1_EXTCLK
SYSCLK
to USB
/3
to RNG
LSI
LSE
to SAI1
HSI16
MSI
HSE
SMPSDIV
/1,2,3,4,6,8,12
to
SMPS
/2
SMPS clock
source control
PCLKn
SYSCLK
HSI16
LSE
to USART1
to LPUART1
to ADC1
PCLKn
SYSCLK
HSI16
to I2Cx
PCLKn
HSI16
LSI
LSE
to LPTIMx
1. The LCD is not available on STM32WB35xx devices.
MS45402V7
3.11
General-purpose inputs/outputs (GPIOs)
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. Fast I/O toggling can be
achieved thanks to their mapping on the AHB2 bus.
DS11929 Rev 10
43/193
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