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AD9742-EB View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD9742-EB
ADI
Analog Devices 
AD9742-EB Datasheet PDF : 32 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
AD9742
PIN 1
INDICATOR
0.80
0.75
0.70
SEATING
PLANE
5.10
5.00 SQ
4.90
TOP VIEW
0.50
BSC
0.30
0.25
0.18
25
32
24
1
EXPOSED
PAD
PIN 1
INDICATOR
3.25
3.10 SQ
2.95
17
8
0.50
16
9
0.25 MIN
0.40
BOTTOM VIEW
0.30
0.05 MAX
0.02 NOM
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
COPLANARITY
0.08
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-WHHD.
Figure 57. 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
5 mm × 5 mm Body, Very Very Thin Quad
(CP-32-7)
Dimensions shown in millimeters
Data Sheet
ORDERING GUIDE
Model1
Temperature Range
AD9742AR
−40°C to +85°C
AD9742ARZ
−40°C to +85°C
AD9742ARZRL
−40°C to +85°C
AD9742ARU
−40°C to +85°C
AD9742ARURL7
−40°C to +85°C
AD9742ARUZ
−40°C to +85°C
AD9742ARUZRL7
−40°C to +85°C
AD9742ACPZ
−40°C to +85°C
AD9742ACPZRL7
−40°C to +85°C
AD9742-EBZ
AD9742ACP-PCBZ
1 Z = RoHS Compliant Part.
Package Description
28-Lead Standard Small Outline Package [SOIC]
28-Lead Standard Small Outline Package [SOIC]
28-Lead Standard Small Outline Package [SOIC]
28-Lead Thin Shrink Small Outline Package [TSSOP]
28-Lead Thin Shrink Small Outline Package [TSSOP]
28-Lead Thin Shrink Small Outline Package [TSSOP]
28-Lead Thin Shrink Small Outline Package [TSSOP]
32-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
32-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
Evaluation Board [SOIC]
Evaluation Board [LFCSP]
Package Option
RW-28
RW-28
RW-28
RU-28
RU-28
RU-28
RU-28
CP-32-7
CP-32-7
Rev. C | Page 30 of 32

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