ADM3485EARZ View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADM3485EARZ Datasheet PDF : 16 Pages
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ADM3485E
PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS
RO 1
8 VCC
RE 2 ADM3485E 7 B
DE 3 TOP VIEW 6 A
(Not to Scale)
DI 4
5 GND
Figure 2. SOIC_N Pin Configuration (R-8)
Table 5. Pin Function Descriptions
Pin
Mnemonic Number
Description
RO
1
Receiver Output. When enabled, if A > B by 200 mV, then RO = high. If A < B by 200 mV, then RO = low.
RE
2
Receiver Output Enable. With RE low, the receiver output (RO) is enabled. With RE high, the output goes into a
high impedance state. If RE is high and DE is low, the ADM3485E enters a shutdown state.
DE
3
Driver Output Enable. A high level enables the driver differential outputs A and B. A low level places it in a high
impedance state.
DI
4
Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI
forces A high and B low.
GND
5
Ground Connection, 0 V.
A
6
Noninverting Receiver Input A/Driver Output A.
B
7
Inverting Receiver Input B/Driver Output B.
VCC
8
Power Supply, 3.3 V ± 0.3 V.
Rev. D | Page 6 of 16
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