Data Sheet
t24
EP_SCLK
EP_MOSI
t25
t26
t28
t27
EP_MISO
Figure 7. SPI Slave Mode Timing (SPI Mode 0)
SCLK
I2S[3:0]
LRCLK
t37
t38
t39
AUDIO INPUT PORTS I2S SIGNAL ASSIGNMENT
INPUT PORT
SCLK
LRCLK
I2S[3:0]
AP1_IN
AP2_IN
AP1_IN_SCLK
AP2_IN_SCLK
AP1_IN5
AP1_IN[4:1]
AP2_IN5
AP2_IN[4:1]
Figure 8. I2S Input Timing
LRCLK
SCLK
I2S[3:0]
LEFT
RIGHT
MSBLEFT
LSB
MSBRIGHT
LSB
32 CLOCK SLOTS
I2S STANDARD
I2S FORMAT = 00
32 CLOCK SLOTS
Figure 9. I2S Standard Audio, Data Width 16 to 24 Bits per Channel
LRCLK
SCLK
I2S[3:0]
LEFT
RIGHT
LSBRIGHT MSBLEFT
16 CLOCK SLOTS
LSBLEFT MSBRIGHT
16 CLOCK SLOTS
LSB
Figure 10. I2S Standard Audio, 16-Bit Samples Only
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