DG417L View Datasheet(PDF) - Maxim Integrated
Part Name
Description
Manufacturer
DG417L Datasheet PDF : 13 Pages
| |||
35Ω, SPST/SPDT, +3V
Logic-Compatible Analog Switches
Applications Information
Power-Supply
Sequencing-Free Operation
Most CMOS switches require specific power-supply
sequencing in order to prevent device latchup. The
older DG417/DG418/DG419 devices require a proper
power-supply sequence of V+, VL, then V-. Otherwise,
it is necessary to add signal diodes to the circuit in
order to prevent potential latchups. The new
DG417L/DG418L/DG419L devices eliminate the need
for a VL input and allow any power-up sequence. Do
not exceed the absolute maximum ratings because
stresses beyond the listed ratings may cause perma-
nent damage to the devices.
______________________________________Test Circuits/Timing Diagrams (continued)
+3V
LOGIC
INPUT
0
VCOM
V+
NC
+10V
NO
IN
V+
COM
DG419L
RL
300Ω
VOUT
CL
35pF
0.9 x VOUT
LOGIC
INPUT
GND
V-
tD
V-
Figure 3. DG419L Break-Before-Make Interval
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
VOUT
IN
OFF
∆VOUT
OFF
ON
ON
OFF
OFF
IN
Q = ∆VOUT x CL
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
Figure 4. Charge Injection
VGEN
N.C.
COM
GND
V+
DG417L
DG418L
V+
DG419L
NC OR
NO
VOUT
CL
V-
1nF
V-
VIN = +3V
_______________________________________________________________________________________ 9
Share Link: 