TH8053
Fault Tolerant Low Speed CAN Transceiver
Operation Modes
The different operation modes can be selected by the
signals provided at the EN- and STB-pins. There are
three operation modes which enable reduced power con-
sumption: the sleep mode, the VBAT-standby mode and
the VDD -standby mode.
The sleep mode (STB=0, EN=0) is the one with the low-
est power consumption because the whole chip and
even the external voltage regulator get disabled. This
mode can only be reached if an intermediate mode
(STB=0, EN=1) is entered which is interpreted as a “go-
to-sleep”-command. Otherwise the chip switches to the
VBAT-standby mode (STB=0, EN=0) where the external
voltage regulator remains further active. In these modes
(go-to-sleep, sleep, VBAT-standby) the RTL-pin is
switched to VBAT.
If the external inhibitable voltage regulator is not the one
that provides the VDD-supply voltage or if the device is
operating in the VBAT-standby mode (external voltage
regulator is active) a wake-up request from either the
WAKE-pin or the CAN bus line is visible as an active
LOW at the NERR and RXD outputs. If VDD has been
switched off in the sleep mode the wake-up request will
cause the TH8053 to enter the VBAT-standby mode as an
intermediate state in which the VDD-supply is present
again and so the wake-up can be observed at the NERR-
and RXD-pins as well.
Another mode is the VDD -standby mode (STB=1, EN=0).
Similar to the normal operation mode the RTL-pin is
switched to VDD. The appearance of a wake-up condition
in this mode is only displayed at the RXD output as an
active LOW. The NERR output is used to indicate the
drop of VBAT below 1V. This warn flag is necessary to
show that VBAT was missing and that a reinitialisation has
to be done. It is reset to HIGH when the device enters
the normal operation mode in which the NERR-pin is
used to indicate bus failures.
During the low power modes (sleep, VBAT- and VDD-
standby) the detection of errors is reduced to the moni-
toring of the appearance of failures 5, 6 and 7. A com-
plete deactivation of the detection circuit is not senseful
because the occurrence of failures 5, 6 and 7 would re-
sult in an increased power consumption.
The TH8053 switches itself to the VBAT-standby mode if
VDD is missing or below the thresh-old. If VDD is missing
the EN and STB inputs will be held internally at LOW
level to prevent the chip from entering an inappropriate
mode (fail safe functionality). In all standby modes the
TH8053 is able to receive interrupts. During the first time
of the go-to-sleep command and the specified time after
switching from the normal operation mode to the standby
modes the device ignores an interrupt.
Table 3 -Mode Control
/STB
0
0
0
EN
Mode
0 VBAT-standby1
0 sleep2
1 go-to-sleep command
1
0 VDD-standby3
1
1 normal operation
INH
NERR
RXD
RTL
high VBAT
floating
floating
high/ VBAT
active LOW wake-up interrupt signal if VDD is
present
switched to VBAT
switched to VBAT
switched to VBAT
active LOW
missing VBAT flag
active LOW
wake-up interrupt
switched to VDD
high/ VBAT
active LOW
error flag flag
HIGH = recessive bus;
LOW = dominant bus
switched to VDD
Power-on Procedure
The chip automatically enters the V BAT -standby mode
because of its fail safe functionality. In the V BAT -
standby mode the INH output will become HIGH and
therefore the voltage regulator will provide VDD -supply.
The CAN transceiver will remain in the VBAT-standby
mode until the CAN controller sets it to another mode.
The controller should first enter VDD-standby Mode. This
way the CAN controller will be shown by the power-on
flag that it has to reinitialize the ECU (e.g. after exchang-
ing the complete CAN unit or after a battery voltage
breakdown).
Through entering the normal mode the VBAT low flag will
be reset. Due to special output stages the CAN bus is
not loaded if V BAT = 0V which ensures data transmis-
sion on the CAN bus even if some ECUs are unpowered.
______________________________
1 Wake-up interrupts are released when the normal operation mode is entered
2 Sleep mode will be entered instead of VBAT-standby mode if the go-to-sleep command was applied before. (EN may turn LOW as VDD drops
without affecting internal functions because of fail safe functionality.)
3 The "missing VBAT" flag will be reset to HIGH when the normal operation mode is entered
Datasheet Rev 1.2 Nov 2000
Page 4
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