PDTA123JMB
PNP resistor-equipped transistor; R1 = 2.2 kΩ, R2 = 47 kΩ
Rev. 1 — 16 May 2012
Product data sheet
1. Product profile
1.1 General description
PNP Resistor-Equipped Transistor (RET) in a leadless ultra small DFN1006B-3
(SOT883B) Surface-Mounted Device (SMD) plastic package.
NPN complement: PDTC123JMB.
1.2 Features and benefits
100 mA output current capability
Reduces component count
Built-in bias resistors
Reduces pick and place costs
Simplifies circuit design
AEC-Q101 qualified
Leadless ultra small SMD plastic
package
Low package height of 0.37 mm
1.3 Applications
Low-current peripheral driver
Control of IC inputs
Replaces general-purpose transistors
in digital applications
Mobile applications
1.4 Quick reference data
Table 1.
Symbol
VCEO
IO
R1
R2/R1
Quick reference data
Parameter
collector-emitter
voltage
output current
bias resistor 1 (input)
bias resistor ratio
Conditions
open base
Tamb = 25 °C
Min Typ Max Unit
-
-
-50 V
-
-
1.54 2.2
17 21
-100 mA
2.86 kΩ
26