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STM32F205VE Ver la hoja de datos (PDF) - STMicroelectronics

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STM32F205VE Datasheet PDF : 177 Pages
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STM32F20xxx
5.1.6 Power supply scheme
Figure 17. Power supply scheme
VBAT
1.8-3.6 V
Power switch
Electrical characteristics
Backup circuitry
(OSC32K,RTC,
Wakeup logic
Backup registers,
backup RAM)
GP I/Os
2 × 2.2 μF VVCCAAPP__12
VDD
15 × 100 nF
+ 1 × 4.7 μF
VDD
1/2/...14/15
VSS
1/2/...14/15
O UT
IN
Voltage
regulator
IO
Logic
Kernel logic
(CPU,
digital
& RAM)
VDD
REGOFF
IRROFF
VDDA
100 nF
+ 1 μF
VREF
100 nF
+ 1 μF
VREF+
VREF-
VSSA
Flash memory
ADC
Analog
RCs, PLL,
...
ai17527e
1. Each power supply pair must be decoupled with filtering ceramic capacitors as shown above. These capacitors must be
placed as close as possible to, or below, the appropriate pins on the underside of the PCB to ensure the good functionality
of the device.
2. To connect REGOFF and IRROFF pins, refer to Section 2.2.16: Voltage regulator.
3. The two 2.2 µF ceramic capacitors should be replaced by two 100 nF decoupling capacitors when the voltage regulator is
OFF.
4. The 4.7 µF ceramic capacitor must be connected to one of the VDD pin.
Doc ID 15818 Rev 9
61/177

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