ADE3700
Register Name
TCON_SRTD_26
TCON_SRTD_27
TCON_SRTD_28
TCON_SRTD_29
TCON_SRTD_30
TCON_SRTD_31
TCON_X_0
TCON_X_1
TCON_X_2
TCON_X_3
TCON_X_4
TCON_X_5
TCON_X_6
TCON_X_7
TCON_X_8
TCON_X_9
TCON_X_10
TCON_X_11
TCON_X_12
TCON_X_13
TCON_X_14
TCON_X_15
TCON_X_16
TCON_X_17
Timing Controller (TCON)
Table 17: TCON Registers (Sheet 4 of 7)
Addr. Mode Bits
0x0B6A R/W
0x0B6B R/W
0x0B6C R/W
0x0B6D R/W
0x0B6E R/W
0x0B6F R/W
0x0B80
R/W
0x0B81 R/W
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:6]
[5:0]
[7:0]
0x0B82 R/W
[7:0]
0x0B83 R/W
[7:0]
0x0B84 R/W
[7:0]
0x0B85 R/W
[7:0]
0x0B86 R/W
[7:0]
0x0B87 R/W
[7:0]
0x0B88 R/W
[7:0]
0x0B89 R/W
[7:0]
0x0B8A R/W
[7:0]
0x0B8B R/W
[7:0]
0x0B8C R/W
[7:0]
0x0B8D R/W
[7:0]
0x0B8E R/W
[7:0]
0x0B8F R/W
[7:0]
0x0B90 R/W
[7:0]
0x0B91 R/W
[7:0]
Default
Description
0x0
Refer to TCON_SRTD_0 for definition.
0x0
Refer to TCON_SRTD_0 for definition.
0x0
Refer to TCON_SRTD_0 for definition.
0x0
Refer to TCON_SRTD_0 for definition.
0x0
Refer to TCON_SRTD_0 for definition.
0x0
Refer to TCON_SRTD_0 for definition.
Reserved
0x0
input selection for SRTD_0.A
0x0
input selection for SRTD_0.B
(Refer to Table 18 for definition)
0x0
input selection for SRTD_1.A
(Refer to Table 18 for definition)
0x0
input selection for SRTD_1.B
(Refer to Table 18 for definition)
0x0
input selection for SRTD_2.A
(Refer to Table 18 for definition)
0x0
input selection for SRTD_2.B
(Refer to Table 18 for definition)
0x0
input selection for SRTD_3.A
(Refer to Table 18 for definition)
0x0
input selection for SRTD_3.B
(Refer to Table 18 for definition)
0x0
input selection for SRTD_4.A
(Refer to Table 18 for definition)
0x0
input selection for SRTD_4.B
(Refer to Table 18 for definition)
0x0
input selection for SRTD_5.A
(Refer to Table 18 for definition)
0x0
input selection for SRTD_5.B
(Refer to Table 18 for definition)
0x0
input selection for SRTD_6.A
(Refer to Table 18 for definition)
0x0
input selection for SRTD_6.B
(Refer to Table 18 for definition)
0x0
input selection for SRTD_7.A
(Refer to Table 18 for definition)
0x0
input selection for SRTD_7.B
(Refer to Table 18 for definition)
0x0
input selection for SRTD_8.A
(Refer to Table 18 for definition)
0x0
input selection for SRTD_8.B
(Refer to Table 18 for definition)
51/89