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AT83C51RB2-3CSCM

80C51 High Performance ROM 8-bit Microcontroller

Atmel Corporation 

Table 10. T2MOD Register

T2MOD - Timer 2 Mode Control Register (C9h)

7

6

5

4

3

-

-

-

-

-

2

1

-

T2OE

Bit

Number

7

6

Bit

Mnemonic Description

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

5

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

4

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

3

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

2

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Timer 2 Output Enable bit

1

T2OE Cleared to program P1.0/T2 as clock input or I/O port.

Set to program P1.0/T2 as clock output.

Down Counter Enable bit

0

DCEN Cleared to disable Timer 2 as up/down counter.

Set to enable Timer 2 as up/down counter.

Reset Value = XXXX XX00b

Not bit addressable

0

DCEN

22 AT80C51RD2/AT83C51Rx2

4113B–8051–03/05

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