LTC1569CS8-7 Ver la hoja de datos (PDF) - Linear Technology
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LTC1569CS8-7 Datasheet PDF : 12 Pages
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LTC1569-7
ELECTRICAL CHARACTERISTICS
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 3V (V + = 3V, V – = 0V), fCLK = 4.096MHz, fCUTOFF = 128kHz, RLOAD = 10k unless otherwise specified.
PARAMETER
Output DC Offset
(Note 2)
Output DC Offset Drift
CONDITIONS
REXT = 10k, Pin 5 Shorted to Pin 4
REXT = 10k, Pin 5 Shorted to Pin 4
Clock Pin Logic Thresholds
when Clocked Externally
VS = 3V
VS = 5V
VS = ±5V
Power Supply Current
(Note 3)
fCLK = 1.028MHz (10k from Pin 6 to Pin 7,
Pin 5 Open, ÷ 4), fCUTOFF = 32kHz
fCLK = 4.096MHz (10k from Pin 6 to Pin 7,
Pin 5 Shorted to Pin 4, ÷ 1), fCUTOFF = 128kHz
fCLK = 8.192MHz (5k from Pin 6 to Pin 7,
Pin 5 Shorted to Pin 4, ÷ 1), fCUTOFF = 256kHz
Power Supply Voltage where
Low Power Mode is Enabled
Clock Feedthrough
Wideband Noise
THD
Clock-to-Cutoff
Frequency Ratio
Max Clock Frequency
(Note 4)
Min Clock Frequency
(Note 5)
Input Frequency Range
Pin 5 Shorted to Pin 4, Note 3
REXT = 10k, Pin 5 Open
Noise BW = DC to 2 • fCUTOFF
fIN = 10kHz, 1.5VP-P
VS = 3V
VS = 5V
VS = ±5V
3V to ±5V, TA < 85°C
Aliased Components <–65dB
VS = 3V
VS = 5V
VS = ±5V
VS = 3V
VS = 5V
VS = ±5V
Min Logical “1”
Max Logical “0”
Min Logical “1”
Max Logical “0”
Min Logical “1”
Max Logical “0”
VS = 3V
VS = 5V
VS = 10V
VS = 3V
VS = 5V
VS = 10V
MIN TYP MAX UNITS
±2
±5
mV
±6
±12
mV
±15
mV
– 25
µV/°C
– 25
µV/°C
± 25
µV/°C
2.6
V
0.5
V
4.0
V
0.5
V
4.0
V
0.5
V
6
8
mA
q
9
mA
7
9
mA
q
10
mA
9
13
mA
q
14
mA
9.5
mA
q
14
mA
20
mA
q
30
mA
27
mA
q
37
mA
q 3.7
4.2
4.6
V
0.4
mVRMS
125
µVRMS
74
dB
32
5
MHz
9.6
MHz
13
MHz
3
kHz
0.9 • fCLK
Hz
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: DC offset is measured with respect to Pin 3.
Note 3: There are several operating modes which reduce the supply
current. For VS < 4V, relative to divide-by-1 mode, the current is typically
reduced by 50% relative to VS = 5V. If the internal oscillator is used as the
clock source and the divide-by-4 or divide-by-16 mode is enabled, the
supply current is typically reduced by 60%,relative to divide-by-1 mode,
independent of the value of VS.
Note 4: The maximum clock frequency is arbitrarily defined as the
frequency at which the filter AC response exhibits >1dB of gain peaking.
Note 5: The minimum clock frequency is arbitrarily defined as the frequecy
at which the filter DC offset changes by more than 5mV.
Note 6: Thermal resistance varies depending upon the amount of PC board
metal attached to the device. θJA is specified for a 2500mm2 test board
covered with 2oz copper on both sides.
3
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