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QL4090-2PB456M Ver la hoja de datos (PDF) - QuickLogic Corporation

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QL4090-2PB456M
QuickLogic
QuickLogic Corporation 
QL4090-2PB456M Datasheet PDF : 35 Pages
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Military QuickRAM Family Data Sheet Rev. C
Bypass Instruction. The Bypass Instruction allows data to skip a device boundary scan entirely, so the
data passes through the bypass register. The Bypass instruction allows users to test a device without passing
through other devices. The bypass register is connected between the TDI and TDO pins, allowing serial data
to be transferred through a device without affecting the operation of the device.
Pin Descriptions
Table 16: Pin Descriptions
Pin
TDI/RSI
Function
Test Data In for JTAG /RAM init.
Serial Data In
Description
Hold HIGH during normal operation. Connects to serial
PROM data in for RAM initialization. Connect to VCC if
unused.
TRSTB/RRO
TMS
Active low Reset for JTAG /RAM init.
reset out
Test Mode Select for JTAG
Hold LOW during normal operation. Connects to serial PROM
reset for RAM initialization. Connect to GND if unused.
Hold HIGH during normal operation. Connect to VCC if not
used for JTAG.
TCK
TDO/RCO
Test Clock for JTAG
Test data out for JTAG /RAM init.
clock out
Hold HIGH or LOW during normal operation. Connect to VCC
or ground if not used for JTAG.
Connect to serial PROM clock for RAM initialization. Must be
left unconnected if not used for JTAG or RAM initialization.
STM
Special Test Mode
Must be grounded during normal operation.
I/ACLK
I/GCLK
I
I/O
High-drive input and/or array
network driver
High-drive input and/or global
network driver
High-drive input
Input/Output pin
Can be configured as either or both.
Can be configured as either or both.
Use for input signals with high fanout.
Can be configured as an input and/or output.
VCC
VCCIO
GND
Power supply pin
Input voltage tolerance pin
Ground pin
Connect to 3.3 V supply.
Connect to 5.0 V supply if 5 V input tolerance is required,
otherwise connect to 3.3 V supply.
Connect to ground.
GND/THERM Ground/Thermal pin
Available on 456-PBGA only. Connect to ground plane on
PCB if heat sinking desired. Otherwise may be left
unconnected.
© 2007 QuickLogic Corporation
www.quicklogic.com
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