STM32F215VEH6V Ver la hoja de datos (PDF) - STMicroelectronics

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Fabricante

STM32F215VEH6V

ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

STMicroelectronics 

Application block diagrams

STM32F21xxx

A.2 Application example with regulator OFF

Figure 82. Regulator OFF/internal reset ON

Power-down reset risen

after VCAP_1/VCAP_2 stabilization

Application reset signal

(optional)

Power-down reset risen

before VCAP_1/VCAP_2 stabilization

VCAP_1/2 monitoring

Application reset

Ext. reset controller active signal (optional)

when VCAP_1/2 < 1.08 V

VDD

(1.8 to 3.6 V)

PA0

VDD

NRST

VDD

(1.8 to 3.6 V)

PA0

VDD

NRST

1.2 V

REGOFF

VCAP_1

VCAP_2

1.2 V

REGOFF

VCAP_1 IRROFF

VCAP_2

ai18476

1. This mode is available only on UFBGA176.

2. In regulator bypass mode, PA0 is used as power-on reset. The connection between PA0 and NRST can consequently

prevent debug connection. If the debug connection under reset or pre-reset is required, the user must manage the reset

and the power-on reset separately.

A.3

USB OTG full speed (FS) interface solutions

Figure 83. USB OTG FS (full speed) device-only connection

VDD

5V to VDD

Volatge regulator (1)

STM32F20xxx

OSC_IN

OSC_OUT

PA9

PA11

PA12

VBUS

DM

DP

VSS

ai17295

1. The same application can be developed using the OTG HS in FS mode to achieve enhanced performance

thanks to the large Rx/Tx FIFO and to a dedicated DMA controller.

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Doc ID 17050 Rev 8

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