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STM32F100V8H6BTR Ver la hoja de datos (PDF) - STMicroelectronics

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STM32F100V8H6BTR Datasheet PDF : 96 Pages
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Electrical characteristics
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
Output voltage levels
Unless otherwise specified, the parameters given in Table 35 are derived from tests
performed under the ambient temperature and VDD supply voltage conditions summarized
in Table 8. All I/Os are CMOS and TTL compliant.
Table 35. Output voltage characteristics
Symbol
Parameter
Conditions
Min Max Unit
VOL(1)
Output Low level voltage for an I/O pin
when 8 pins are sunk at the same time
CMOS port(2)
-
0.4
VOH(3)
Output High level voltage for an I/O pin
when 8 pins are sourced at the same time
IIO = +8 mA,
2.7 V < VDD < 3.6 V
VDD–0.4
-
V
VOL(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
TTL port(2)
-
VOH(3)
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
IIO = +8 mA
2.7 V < VDD < 3.6 V
2.4
0.4
V
-
VOL(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
IIO = +20 mA(4)
-
1.3
VOH (3)
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
2.7 V < VDD < 3.6 V
VDD–1.3
-
V
VOL(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
IIO = +6 mA(4)
-
0.4
VOH(3)
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
2 V < VDD < 2.7 V
VDD–0.4
-
V
1.
The
and
tIhIOe
current
sum of
sunk by the device must
IIO (I/O ports and control
always respect
pins) must not
the absolute
exceed IVSS.
maximum
rating
specified
in
Table
6
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
3.
TTahbeleIIO6
current sourced by
and the sum of IIO
the
(I/O
device must always respect the absolute maximum
ports and control pins) must not exceed IVDD.
rating
specified
in
4. Based on characterization data, not tested in production.
60/96
DocID16455 Rev 9

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