STM32F301K6T7TR Ver la hoja de datos (PDF) - STMicroelectronics

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STM32F301K6T7TR

ARM® Cortex®-M4 32-bit MCU+FPU, up to 64 KB Flash, 16 KB SRAM, ADC, DAC, COMP, Op-Amp, 2.0 – 3.6 V

STMicroelectronics 

Revision history

STM32F301x6 STM32F301x8

Date

04-Jun-2015

22-Jul-2016

Table 82. Document revision history (continued)

Revision

Changes

Updated:

5

– AF9 value for PA1, PA3 and PA9 in Table 14: Alternate functions

for Port A,

– the structure of Section 7: Package information.

Updated notes on:

– All document tables by removing the “not tested in production”

specification.

– Table 13: STM32F301x6/8 pin definitions.

– Table 20: Voltage characteristics.

– Table 70: Comparator characteristics.

– Figure 4: STM32F301x6/8 UFQFN32 pinout.

– Figure 5: STM32F301x6/8 LQFP48 pinout.

– Figure 6: STM32F301x6/8 LQFP64 pinout.

– Figure 7: STM32F301x6/8 WLCSP49 ballout.

– Figure 24: Recommended NRST pin protection.

– Figure 45: UFQFPN32 - 32-pin, 5x5 mm, 0.5 mm pitch ultra thin

fine pitch quad flat package outline.

Updated tables:

– Updated VREFINT line on Table 27: Embedded internal reference

6

voltage.

– Updated “Conditions” column on Table 43: LSE oscillator

characteristics (fLSE = 32.768 kHz).

– Added CMIR and tSTAB lines on Table 64: ADC characteristics.

– Updated RLOAD line on Table 69: DAC characteristics.

– Updated VOHSAT and VOLSAT lines on Table 71: Operational

amplifier characteristics.

Updated figures:

– Figure 2: Clock tree.

– Figure 7: STM32F301x6/8 WLCSP49 ballout.

– Figure 21: Five volt tolerant (FT and FTf) I/O input characteristics

- CMOS port.

– Figure 24: Recommended NRST pin protection.

Added:

– Table 39: Wakeup time using USART

Updated name of Section 8: Ordering information

134/135

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