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PSD834F5A-15UI Ver la hoja de datos (PDF) - STMicroelectronics

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PSD834F5A-15UI Datasheet PDF : 128 Pages
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AC/DC parameters
PSD8XXFX
Table 42. AC signal letters for PLD timing(1)
Letter
Signal description
A
Address input
C
CEout output
D
Input data
E
E output
G
Internal WDOG_ON signal
I
Interrupt input
L
ALE input
N
RESET input or output
t(s) P
Port signal output
c Q
Output data
du R
WR, UDS, LDS, DS, IORD, PSEN inputs
ro S
Chip Select input
P T
R/W input
te W
Internal PDN signal
ole M
Output macrocell
bs 1. Example: tAVLX = time from address valid to ALE invalid.
- O Table 43. AC signal behavior symbols for PLD timing(1)
t(s) Letter
AC signal description
c t
Time
du L
Logic level low or ALE
roH
Logic level high
PV
Valid
te X
No longer a valid logic level(2)
ole Z
Float
s PW
Pulse width
Ob 1. Example: tAVLX = time from address valid to ALE invalid.
2. Output Hi-Z is defined as the point where data out is no longer driven.
Table 44. AC measurement conditions
Symbol
Parameter
CL
Load capacitance
Min.
Max.
Unit
30
pF
96/128
Doc ID 7833 Rev 7

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