DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ZPSD412A0-C-70U データシートの表示(PDF) - STMicroelectronics

部品番号
コンポーネント説明
メーカー
ZPSD412A0-C-70U Datasheet PDF : 123 Pages
First Prev 81 82 83 84 85 86 87 88 89 90 Next Last
PSD4XX Family
Microcontroller Interface – AC/DC Parameters (5 V ± 10% Versions)
Port A Peripheral Data Mode Read Timing (5 V ± 10%)
Symbol
Parameter Conditions
-70
-90**
-15
ZPLD_TURBO
Min Max Min Max Min Max OFF*
Unit
tAVQV (PA) Address Valid to
Data Valid
(Note 3)
45
55
62
Add 10
ns
tSLQV (PA) CS Valid to Data
Valid
55
55
62
Add 10
ns
RD to Data Valid (Notes 1 and 4)
22
26
45
0
ns
t RLQV (PA)
RD to Data Valid
8031 Mode
32
38
45
0
ns
tDVQV (PA) Data In to Data Out
Valid
22
22
26
0
ns
tQXRH (PA) RD Data Hold Time (Note 1)
0
0
0
0
ns
tRLRH (PA) RD Pulse Width
(Note 1)
25
30
38
0
ns
tRHQZ (PA) RD to Data High-Z (Note 1)
20
25
33
0
ns
Port A Peripheral Data Mode Write Timing (5 V ± 10%)
Symbol
Parameter
-70
-90**
-15
ZPLD_TURBO
Conditions Min Max Min Max Min Max
OFF
Unit
t WLQV (PA)
t DVQV (PA)
t WHQZ (PA)
WR to Data
Propagation Delay
Data to Port A Data
Propagation Delay
WR Invalid to
Port A Tri-state
(Note 2)
(Note 5)
(Note 2)
25
27
35
0
ns
22
22
26
0
ns
20
25
33
ns
NOTES: 1. RD timing has the same timing as PSEN, DS, LDS, UDS signals.
2. WR timing has the same timing as E, DS, LDS, UDS, WRL, WRH signals.
3. Any input used to select Port A Data Peripheral Mode.
4. Data is already stable on Port A.
5. Data stable on ADIO pins to data on Port A.
**If ZPLD_TURBO is off and the ZPLD is operating above 15 MHz, there is no need to add 10 ns to the timing parameters.
**The -90 speed is available only on Industrial Temperature Range product.
86

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]